In the manufacturing of integrated circuits, the use of large-size silicon wafers is becoming more common to increase capacity and reduce costs. At the same time, in order to improve chip performance and packaging density, the development of three-dimensional packaging technology requires thinning of large-size silicon wafers. Residual stress generated during thinning process can lead to wafer warpage, which increases the risk of wafer breakage during transportation and subsequent processing. Wafer warpage is an important technical indicator for evaluating the quality of wafer processing, and also serves as a key basis for analyzing residual stresses in wafer processing and optimizing thinning processes. In the application of quartz wafers, most processing is done in a flat orientation, necessitating the measurement of data plane after eliminating the influence of gravity-induced deformation, especially the WARP and BOW values. The data on the original wafer surface shape is more valuable than the data after gravity-induced deformation. The measurement results after gravity-induced deformation vary significantly depending on the placement method, making it difficult to establish a standard. Therefore, a new approach involves testing the wafers in a vertical state to eliminate the impact of gravity on measurements and improve accuracy. Creative Intelligence’s TS-C series spectral confocal displacement sensor can measure the flatness and warpage of wafers with sizes up to 12 inches by using a motion device for thickness measurement.